1. Field of the Invention
The present invention relates to a package for enclosing semiconductor elements; more particularly, it relates to a ceramic package for enclosing a large-scale integrated (LSI) circuit having a number of input/output pins arranged in a matrix fashion, in other words, in a pin grid array, on the rectangular back surface of the package, wherein the side surfaces of the package are treated so as to prevent the LSI circuit from being destroyed due to static electricity.
2. Description of the Prior Art
Generally, packages for enclosing pin grid-type LSI circuits have rectangular front and back surfaces. On the back surface, a number of input/output pins are arranged in a matrix fashion. On the central portion of the front surface, a stage pattern for mounting an LSI chip is formed. On the periphery of the stage pattern on the front surface, an inner pattern is formed to which input/output terminals of the LSI chip are connected through gold wires, respectively. The inner pattern, on the other hand, is connected by tungsten wires to the input/output pins provided on the back surface. On the periphery of the inner pattern, a sealing pattern is formed. The exposed portions of the stage pattern, the inner pattern, and the sealing pattern are electrically plated with gold.
In order to apply a voltage to the stage pattern, the inner pattern, and the sealing pattern, for executing the electrolytic plating of gold, wires for applying the voltage are provided in the package. These wires for applying the voltage are connected at one end to the input/output pins. The other ends of the wires for applying the voltage are exposed on the side surfaces of the package. During electrolytic plating, these exposed ends of the wires are electrically in contact with a conductive layer. After electrolytic plating, the conductive layer is removed. Accordingly, the complete package as a marketable article has side surfaces on which the ends of the wires for applying the voltage are exposed. When a person picks up the complete package with his fingers, the fingers inevitably touch the side surfaces so that a high voltage due to static electricity may often be applied between the exposed ends of the wires for applying the plating voltage, resulting in damage of the LSI chip.
Conventionally, there has been no means provided on the side surfaces for preventing the LSI chip from being destroyed due to static electricity.